1. Field of the Invention
The present invention relates to a digital phase comparing circuit. The circuit according to the present invention can be utilized in various field, for example, in an apparatus employing a phase locked loop (PLL) circuit, e.g., acoustic equipment such as a stereo, a television set and the like, a frequency synthesizer, or telecommunication equipment.
2. Description of the Related Art
A digital phase comparing circuit is generally comprised of a plurality of logic gates constituted by a plurality of transistors formed and integrated on a semiconductor substrate, and constituted such that it receives two digital input signals, and based on a phase comparison thereof, outputs an output signal having a pulse width corresponding to the phase difference between the digital input signals.
An example of such a circuit is disclosed, for example, by USP 3,610,954, wherein the circuit is constituted by a plurality of types of NAND gates, i.e., two-input type, three-input type, and four-input type NAND gates, and the logical level of the pulse signal output based on the phase comparison is fixed to either the "L" level or "H" level.
In practical application, however, it is assumed that an "H" level (or "L" level) signal is more convenient than an "L" level (or "H" level) signal as the input signal of a circuit following the phase comparing circuit. In this case, to adapt the phase comparing circuit to the following circuit, an inverter for inverting the "L" level (or "H" level) signal to the "H" level (or "L" level) signal must be added in parallel to the output end. This leads to an increase in the region of the semiconductor substrate needed for the formation of the transistors constituting the inverter, and thus is not preferable from the viewpoint of obtaining a high degree of integration. Also, since the above circuit employs a plurality of types of NAND gates, a plurality of gate circuit patterns corresponding to the types of NAND gates must be prepared, and accordingly, the patterning process during the production of the circuit becomes very complicated and unpreferable.